[IJECE] Prof. Sotirios G. Ziavras

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Sotirios G. Ziavras
Professor & Director of the Computer Architecture and Parallel Processing Laboratory (CAPPL)
Department of Electrical and Computer Engineering
New Jersey Institute of Technology
University Heights
Newark, New Jersey 07102, USA
SCOPUS ID : 7004746769

Dr. Ziavras received the Diploma in Electrical Engineering from the National Technical University of Athens (NTUA), Greece (1984), the M.Sc. degree in Electrical and Computer Engineering from Ohio University (1985), and the D.Sc. degree in Computer Science from George Washington University (1990). He graduated from NTUA in 9 semesters (normal duration of studies: 5 years/10 semesters).

He was a Graduate Teaching Assistant and a Research Assistant at Ohio University, and a Distinguished Graduate Teaching Assistant and a Research Assistant at George Washington University. He received an award from the Hellenic Government (IKY) in 1984 and the Richard E. Merwin Ph.D. Fellowship in 1986. From 1988 to 1989, he was also with the Computer Vision Laboratory of the Center for Automation Research at the University of Maryland in College Park, performing research in supercomputing techniques for parallel computer vision and numerical analysis (actual implementations on a Connection Machine supercomputer were also involved).

He was with the RISO National Research Laboratory of Denmark in the summer of 1983, performing research in interactive computer graphics. He was a visiting Assistant Professor in the Electrical and Computer Engineering Department at George Mason University in the Spring of 1990. He joined the Electrical and Computer Engineering Department at NJIT in the Fall of 1990 as an Assistant Professor. He was promoted to Associate Professor in 1995 and then to Professor in 2001. He also holds a joint appointment in Computer Science.

He served as the Associate Chair for Graduate Studies in the ECE Department from 2001 to 2004 and again from 2007 to 2008. He is the recipient in 2011 of the NJIT award in the category Excellence in Graduate Instruction.

He has authored more than 160 papers. He is the Director of the Computer Architecture and Parallel Processing Laboratory (CAPPL). His main research interests are advanced computer architecture, reconfigurable computing, chip multiprocessors, parallel processing (architectures and algorithms), embedded systems, special-purpose hardware designs (for image processing, numerical analysis, etc.), hardware support for network security and ubiquitous computing.

He received a Research Initiation Award from the National Science Foundation in 1991. His research has been supported by the National Science Foundation (NSF), the Defense Advanced Research Projects Agency (DARPA), the New Jersey Commission on Science and Technology (NJCST), the U.S. Department of Energy (DOE), AT&T, NJIT, etc. He received in 1996 an NSF/DARPA (also sponsored by NASA) New Millennium Computing Point Design Studies grant for the design and feasibility analysis of a parallel computer that could achieve by the year 2005 near PetaFLOPS performance. He has served as a reviewer for many NASA and NSF proposals, and as a panel member for the evaluation of research proposals submitted to Federal Government agencies.